For example, dynamic random access memory ("DRAM") chips, as well as other semiconductor circuits, have substrates that have often been biased with a negative voltage, such as -2 volts, during operation. However, ion contamination can prevent the circuit from working properly during normal operation when the substrate is biased at its normal operating voltage. More specifically, the source and drain regions of adjacent transistors are separated by a non-conductive field oxide. Due to wiring on the chip, this oxide is often overlaid with a conductive material. This effectively forms the gate of an unwanted transistor comprised of a source and drain from adjacent transistors, a gate from the overlying conductive material, and the field oxide as an insulating layer between the gate and a channel region. If the field oxide has ion contamination, the threshold of this spurious transistor becomes low enough that a conductive channel is created under the field oxide when the conductive material is activated. The problem of mobile ion contamination becomes more acute as transistors are placed in close proximity to each other on a chip.
The substrates of these high density integrated circuits are typically operated at a negative substrate voltage level. This effectively raises the threshold voltage at which these unwanted transistors begin to conduct. Therefore, the problem of mobile ion contamination is less likely to occur. In the past, testing of chips to uncover ion contamination problems has been accomplished by grounding the substrate because, if the circuit will work with a grounded substrate, it certainly will work with the substrate biased at the normal operating voltage. However, with increased component density, integrated circuits often will not function properly with a grounded substrate even when ion contamination is not present. As a result, there is no reliable, cost-effective technique for testing these high density integrated circuits for ion contamination.